Wafer-scale computing(?)

I recently heard that new computer chips are being developed which occupy entire silicon wafers. Understandably, these are incredibly expensive and bespoke due to extremely low defect tolerance, but they are also very space and energy efficient for supercomputer applications because they eliminate a lot of the redundant resources and communication overhead that you would get from having to coordinate many smaller chips.

Would wafer-scale computing be a feasible future for the classical part of D-Wave's hybrid system? And how well would wafer-scale computing translate directly to quantum computing?



1 comment
  • Hello,

    Thank you so much for your interest and for reaching out to us.

    Unfortunately we don't have anything we can talk about at this time. 

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