Timing comparison for simulated and quantum annealing
I'm trying to create a plot for a 1d Ising Chain demonstrating what I assume is sublinear time scaling for the qpu solver. I have tried using Python's clock function as well as
sampleset.info["timing"]
In this case, there is a large amount of variability between runs, and the total time, though superior to simulated annealing (implemented in dimod) still scales quadratically. My question is
1) In the breakout from the sampleset info, which part should I use to most directly compare with simulated annealing?
2) How can I minimize variability in timing for repeated experiments? All annealing parameters are currently set to defaults.
Comments
Hi Charles,
Comparing Simulated annealing and Quantum annealing is difficult as SA is a classical heuristic that runs locally on your system. It solves problems in a fundamentally different way than the quantum annealing QPU.
If you are interested in the run time, I would recommend that you use the timing info from the sampleset instead of python's clock as it includes a lot of overhead (https://docs.dwavesys.com/docs/latest/c_qpu_timing.html).
This document provides a complete breakdown of the output from sampleset.info[“timing”]:
https://docs.dwavesys.com/docs/latest/timing_cloud_client_use.html#qpu-timing-information-from-sapi
Here are my answers to your questions:
1) For your analysis, you might want to look at qpu_anneal_time_per_sample: time for one anneal, qpu_sampling_time: total time for R(number of reads) samples and run_time_chip: time the problem runs on the chip. However, as I mentioned earlier a direct comparison between SA and QA is a hard research problem.
2) To minimize variability in timing for different runs, there are sources for timing variation which needs to be considered. For instance, use the same system for each run and if you are using the Advantage system, fix the problem and embedding for each run as the qubit location and number of qubits used impacts QPU access time.
Additionally, you might find this article(https://support.dwavesys.com/hc/en-us/community/posts/360029176034-Limits-of-Simulated-Annealing-Sampler) useful.
Please let me know if you have any further question.
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