Decoherence Time vs Annealing Time

On the recent "Take the Leap" Webinar you addressed the question of how decoherence time relates to the annealing run-time.

It caught my attention that the decoherence time of a single flux qubit is reported to be on the order of nanoseconds, while your annealing runs are on the order or microseconds (5-20us), in comparison [not sure if it's a direct or fair comparison] IBM's commercial 20-qubit device claims to have a coherence time of about 100 microseconds*, and rigetti's device is also in the range of microseconds**.

As a somewhat experienced user of your machine, thanks to Leap, I can attest that Quantum Annealing works in sampling from low energy configurations of the Ising models given to it. Which makes me think that the ~3 orders of magnitude difference between decoherence time and annealing time is detrimental but still allows the device to operate.

So, I have a few questions that maybe can be addressed separately, or maybe just point to the best resources to read about them:

1) Is this decoherence time a fundamental/physical limitation of the technology (i.e flux qubits) used by D-Wave? will it improve? will it scale nicely?

2) Is the new generation of devices going to have an improvement on this parameter, and if so, do you expect it to be a significant improvement?

3) Can you explain or point to an explanation on the choice of annealing schedule? According to AQC the system should evolve slowly, but... decoherence time...

* https://www.ibm.com/blogs/research/2018/08/understanding-complexity-quantum-circuit-compilation/

** https://quantumcomputingreport.com/scorecards/qubit-quality/

1

Comments

4 comments
  • I would like to know these answers as well.

    0
    Comment actions Permalink
  • Hi Jose,

    Here are the answers I received from our team:

    1) Although decoherence time is not a fundamental limitation of the technology, to simultaneously improve decoherence time and keep the levels of control we need to perform annealing is a very challenging engineering task.
    In our latest product we have managed to simultaneously increase coherence and processor scale.

    The following two papers might be helpful in illustrating these challenges, and the approaches used to overcome them:

    Robustness of adiabatic quantum computation:
    https://core.ac.uk/download/pdf/4871442.pdf

    Thermally assisted quantum annealing of a 16-qubit problem:
    https://www.nature.com/articles/ncomms2920.pdf

    2) We are developing a lower-noise stack that has significantly improved coherence. We’ve seen that this new fabrication stack, applied to the 2000Q generation, leads to significantly improved performance. Richard Harris presented some of these results at the APS March Meeting earlier this month.

    3) The choice of annealing schedule is usually done empirically, usually by simply doing a sweep of the annealing_time parameter and finding the value that optimizes the metric of interest, e.g., annealing-time-to-solution.

    I hope this was helpful!

    1
    Comment actions Permalink
  • Thanks a lot for the quick answers. I have one follow up question.

    Would you suggest always running a sweep of the annealing_time parameter?

    Or is this something that could be determined before running the experiments? for example, from problem size.

     

     

    0
    Comment actions Permalink
  • Hi Jose,

    I am assuming here you mean assessing the optimal annealing time and testing different annealing times?
    Please correct me if I am mistaken.

    In general a longer, smoother annealing time is better.
    This is especially the case with longer chains.
    There are a few edge cases where this is not the case though, so it is worth investigating on occasion.

    This is a trade-off as longer anneal times take more time, and with limited time and resources, it might be better to optimize other parameters.
    For instance, optimizing the pause might be a good place to invest the time.

    This is also very problem specific, as some problems will not benefit from having a pause, but it is worth mentioning.

    Here is some documentation on pauses in anneal schedule:
    https://docs.dwavesys.com/docs/latest/c_qpu_0.html#pause-and-quench

    There are also a couple of community posts by members adjusting the anneal schedule:
    https://support.dwavesys.com/hc/en-us/community/posts/360016680754-Annealing-schedule-Need-example-
    https://support.dwavesys.com/hc/en-us/community/posts/360014009713-Controlling-the-global-annealing-schedule

     

     

    1
    Comment actions Permalink

Please sign in to leave a comment.

Didn't find what you were looking for?

New post